一、在通常的寄存器測試中，寄存器模型主要是依賴driver將讀取值返回，來更新鏡像值和期望值。這個功能被稱之為auto_predict功能。在建立寄存器模型時需要添加以下語句來打開此功能：

sys_ral_model.default_map.set_auto_predict(1);

       二、除了使用driver的返回值更新寄存器模型（如下图左）外，還有另一種形式，在這種形式中，是由monitor將總線上收集到的transaction交給寄存器模型（如下图右）來更新形影寄存器的值。

三、使用這種方法需要例化一個reg_predictor，並且為這個實例再例化一個adapter：

class uvm_mdma_top_env extends uvm_env;
  ral_sys_ral_modem                            uvm_mdma_top_ral_model;
  uvm_apb_reg_adapter                          reg_sqr_adapter;
  uvm_apb_reg_adapter                          mon_reg_adapter;

  uvm_reg_predictor#(svt_apb_mst_transaction)  reg_predictor;

  `uvm_component_utils(uvm_mdma_top_env)

  extern virtual function void build_phase(uvm_phase phase);
  extern virtual function void connect_phase(uvm_phase phase); 


endclass : uvm_mdma_top_env

function void uvm_mdma_top_env::build_phase(uvm_phase phase);
  super.build_phase();
  if(uvm_mdma_top_ral_model == null) begin
    uvm_mdma_top_ral_model = ral_sys_ral_modem::type_id::create("uvm_mdma_top_ral_model", this);
    uvm_mdma_top_ral_model.configure(null, "top.dut_i");
    uvm_mdma_top_ral_model.build();
    //lock之後再不能向reg_model（block）中添加寄存器
    uvm_mdma_top_ral_model.lock_model(); 
    //必須執行，將default value configure到reg_model中
    uvm_mdma_top_ral_model.reset();  
  end
  
  uvm_config_db#(uvm_reg_block)::set(null, "", "__SVT_RAL_TEST_MODEL__", uvm_mdma_top_ral_modem);
  uvm_config_db#(ral_sys_ral_chip)::set(uvm_mdma_top_sequencer, "", "uvm_mdma_top_ral_model", uvm_mdma_top_ral_model);
  reg_sqr_adapter = uvm_apb_reg_adapter::type_id_create("reg_sqr_adapter", this);
  mon_reg_adapter = uvm_apb_reg_adapter::type_id_create("mon_reg_adapter", this);
  reg_sqr_adapter.provides_response = 1;
  
  reg_predictor = uvm_reg_predictor#(svt_apb_mst_transaction)::type_id::create("reg_predictor", this);
  
endfunction : build_phase

function void uvm_mdma_top_env::connect_phase(uvm_phase phase);
  super.connect_phase();
  uvm_mdma_top_ral_model.default_map.set_sequencer(apb_master[0].sequencer, reg_sqr_adapter);
  uvm_mdma_top_ral_model.default_map.set_auto_predict(1);
  //只有設置了map后，才能將predictor和寄存器關聯在一起
  reg_predictor.map = uvm_mdma_top_ral_model.default_map; 
  reg_predictor.adaptor = mon_reg_adaptor;
  //將reg_predictor和apb_master的item_observed_port連接起來，這樣就又多了一條更新寄存器模型的路徑
  this.apb_master_agent.monitor.item_observed_port.connect(reg_prodictor.bus_in);

  uvm_mdma_top_sequencer.mdma_sqr[0] = mdma_agent_i[0].sequencer;

endfunction : connect_phase